A Comparative Analysis and Evaluation of software/hardware Partitioning Algorithms for Embedded System

Abstract

Abstract
Hardware/software partitioning has been considered as one of the most crucial steps in the design of embedded systems is i.e. deciding which components of the system should be implemented in hardware and which ones in software. Majority of the hardware/software partitioning problem formulations are N P-hard, this is the reason why most researchers are focusing on developing efficient heuristic methods. This paper compare the most popular heuristic methods after which the most simplest and efficient methods were considered for the design of a combinatorial structure. Two versions of the partitioning problem were considered, one N P-hard, and one with polynomial time solution. This is to understand the real cause of complexity in hardware/software partitioning. The heuristic makes use of problem-specific knowledge, and can thus find high-quality solutions rapidly, and also the polynomial-time algorithm serves as the basis for a highly efficient novel heuristic for the N P-hard version of the problem and it was observed after comparison that multi-level algorithm when implemented gives more efficiency and the different versions when combined supplement each other by eliminating the problems encountered when each of them act alone.
Key words: Hardware/software partitioning, heuristic, N P-hard, polynomial time solution